III-nitride transistors are promising for high-speed and high-power applications, such as power switches, which may be used for motor drivers and power supplies, among other applications.
Many of these applications require the transistor to operate in normally-off mode. Normally-off mode operation can be realized by a number of approaches, but typically at the penalty of higher on-resistance and lower output-current.
U.S. patent application Ser. No. 13/456,039, filed Apr. 25, 2012 describes a normally-off III-Nitride field-effect transistor and a method for making a normally-off FET.
U.S. patent application Ser. No. 14/041,667, filed Sep. 30, 2013 describes normally-off III-nitride transistors with high threshold-voltage and low on-resistance.
High-power applications with normally-off III-nitride transistors need an insulated gate to achieve low leakage current, and an effective passivation dielectric to achieve minimal trapping effects.
The best-suited gate insulator and the best-suited passivation dielectric are usually different materials, which may cause processing compatibility problems. For example, plasma-enhanced chemical vapor deposition (PECVD) SiN film is a known good passivation material, while metal organic chemical vapor deposition (MOCVD) AlN is a known good gate insulator material.
Unfortunately, the process of forming MOCVD AlN can degrade a PECVD SiN film that is already deposited on the semiconductor.
What is needed is a device structure and method of making the device that resolves this process incompatibility and that has a high breakdown voltage and low on resistance. The embodiments of the present disclosure answer these and other needs.